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NEW QUESTION: 1
A message passing system between two CPUs is implemented using data stored in a shared area of memory. To pass a message, the first CPU executes the instructions:
The second CPU receives the message using the instructions:
On both CPUs, r1 = 0x5000 and r2 = 0x6000. At which of the points A, B, C and D must Data Memory Barrier (DMB) instructions be placed in order to ensure messages are passed reliably and efficiently?
A. A only
B. A and D
C. C only
D. B and C
Answer: B
NEW QUESTION: 2
Which of the following descriptions regarding IPv6 addresses are correct? (Choose two)
A. IPv6 extension headers are processed in order.
B. IPv6 extension headers are processed randomly.
C. IPv6 addresses are 128 bits in length.
D. IPv6 addresses are 64 bits in length.
Answer: A,C
NEW QUESTION: 3
A. (config)#no ip cef
(config)#interface fa0/0
(config-if)#ip verify unicast source reachable-via rx
B. (config)#ip cef
(config)#interface fa0/0
(config-if)#ip verify unicast source reachable-via rx allow-default
C. (config)#interface fa0/0
(config-if)#ip verify unicast source reachable-via any
D. (config)#ip cef
(config)#interface fa0/0
(config-if)#ip verify unicast source reachable-via rx
Answer: B